1. Field of the Invention
The present invention relates to information processing technology and, more particularly, to a compiler of a program and a program partitioning method used in the compiler.
2. Description of the Related Art
The recent development of information processing technology allows a single information processing apparatus to perform a variety of functions by running software recorded in a recording medium such as a CD-ROM or software downloaded from a server on a network. In this background, efficient and high-speed execution of a program is always an important challenge.
For high-speed processing, it is not only necessary to improve the processing capability of a processor but also to improve the rate of data transfer between units in an information processing apparatus such as between processor units and between a processor and a memory. One of the technologies that allow a processor to access data or programs stored in a memory at a high speed is hierarchization of a memory using a cache memory. In general, a cache memory is a memory having a smaller capacity than a main memory and configured for high-speed access. By storing frequently accessed data in a cache memory, frequency of accesses to a main memory is reduced so that time required for data access is reduced as a whole. Some multiprocessor systems provided with a plurality of processors are also configured such that a local memory is provided for each processor to store data temporarily so that high-speed access to as much data as possible is enabled.
For a processor to execute a program at a high speed, it is also necessary to access machine codes at a high speed. Memories that allow high-speed access, i.e., high-speed memories, generally have a small capacity. As such, the entirety of a program may not be cached, i.e., stored in a high-speed memory, depending on the size of the program. In this case, a programmer needs to partition a program into a plurality of modules manually and write a program for caching the modules from a main memory to a high-speed memory at an appropriate point of time.